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Design of High Performance Repeater for High Speed VLSI Interconnects

Manjula Jayamma, Rama Subbaiah Boya


Process variation and circuit aging in the nanometer regime result in remarkable, unneeded, and ambiguous characteristics of circuit systems. The designers continue to face a significant challenge as a result of these effects on system design. Even though the guard band design can offer some protection from these effects, it also causes more design problems. As a result, circuits need to be given the ability to tune themselves, compensating for variations with a proposed adaptive nature. Supply voltage adaptation for variation resilience in VLSI interconnects is the goal of this work. The primary concept is a boostable repeater design that can temporarily and independently raise its internal voltage rail to speed up switching. Variations can be compensated by turning on or off the boosting. Fine-grained voltage adaptation is made possible by the boostable repeater design without the need for a separate power grid or stand-alone voltage regulators. Since huge repeaters are used in chip designs and interconnects are widely acknowledged as a bottleneck in chip performance, boostable repeaters have numerous opportunities to enhance system robustness.

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