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Design of Power Efficient and High Temperature Operational Priority Encoder
Abstract
This research paper proposes a novel approach to designing a power-efficient and high-temperature operational priority encoder using Silicon Carbide (SiC) JFETs (Junction Field-Effect Transistors) and Carbon Nanotube Field-Effect Transistors (CNFETs).[1] The proposed priority encoder leverages the superior thermal stability and low power consumption characteristics of SiC JFETs and CNFETs to achieve reliable performance in extreme environments. The proposed priority encoder architecture is meticulously designed to harness the inherent characteristics of SiC JNFET and CNTFETs, exploiting their exceptional electrical properties such as low power dissipation, high switching speeds, and excellent scalability[3]. By leveraging these attributes, the proposed priority encoder achieves significant power optimization and high operational temperature compared to conventional CMOS-based designs.
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