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Design of an ALU using a Hybrid Synchronous Counter

Divij Joshi, K. B. Ramesh

Abstract


In computing, an arithmetic logic unit is a combined digital circuit that performs bitwise and mathematical operations on integers and binary integers. The aim of this paper is to design an ALU using 8-bit.

Programmable synchronous counter, that is a combination of straight and twisted ring counters. It performs ALU operations on two 4-bit binary values and outputs the result. An ALU performs the arithmetic and logical operations on two 4- bit numbers. These operations include addition, subtraction, logical AND, OR, XNOR, LEFT SHIFT AND RIGHT SHIFT.

Multiple ALU outputs are possible based on the values of select lines received from the counters.


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References


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