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Developing a Model for Runtime Framework for Message Driven Parallel Applications on GPU systems

Morsa Chitanya

Abstract


In recent years, accelerators such as Graphics Processing Units (GPU), Field Programmable Gate Arrays (FPGA), Many Integrated Cores (MIC) and Cell processors are being used increasingly for accelerating SIMD computations. Accelerators deliver higher Performance Per Watt (PPW) when compared to general purpose processors by packing large number of light weight cores in a chip. Thermal Design Power (TDP) corresponds to the maximum heat generated by the CPU which the cooling systems are required to dissipate. Peak power for a CPU is usually 1.5 times higher than TDP, and TDP is designed to be greater than the average power. For example, the Kepler K20X GPUs have TDP of 235Watts and peak processing power of 3950 GFLOPS for single precision operations [3], and Intel Xeon Processor E5-2670 has max TDP of 115 Watts and 666 GFLOPS [4, 5]. HenceK20X GPUs have PPW of 16.8 GFLOPS compared to 5.79 GFLOPS for Intel Xeon E5-2670. The top 10 energy efficient supercomputers listed in the Green500 [6] list released in November 2013 use NVIDIA Kepler GPUs. Hence, in addition to exploiting parallelism available in multicores, applications should also be ported to utilize accelerators. This requires application programmers to use different programming language extensions such as MPI, Open MP, CUDA etc to exploit parallelism at different levels.


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References


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