Reduction of Current Leakage in VLSI Systems

Abstract

This paper comprising of the general data about the VLSI followed by the history and improvement of the VLSI. MOORE's LAW is clarified presently and the planning of the VLSI circuits is clarified by the structure of VLSI by HIERARCHY-STRUCTURE. In this paper a portion of the general conversation on the current leakage reduction in the processors are examined in which the decrease of current leakage by utilizing switches are incorporated and furthermore we can lessen the current leakage in the circuit by utilizing " sleep transistor". Sleep transistors are the transistor which turns off completely when the circuit is not in use. This is a very effective technique. After that some of the discussions about the problems in implementing the sleep transistors is also discussed which is very important while designing any circuit?

Keywords: VLSI, NAND, transisters