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Comparator: Existing architectures and a novel design methodology
Abstract
By quality of its targeting a large variety of applications, comparators have received considerable research interest. This work examines the key advances in the circuit design of a low power comparator. Further, a new circuit employing an inverter to replace the comparator is proposed. The proposed threshold inverter quantisation based comparator is able to perform comparison at a very low power dissipation and less propagation delay. An authentic circuit simulator is employed to confirm the validity of the design, which calculates the delay of 160 ps and the power consumption of 3 µW. This design finds applications in all mixed signal designs employed in communication systems, biomedical devices and data converters
References
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