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Analysis of Carbon Nanotube based Ternary Multiplexer
Abstract
In this paper, a new ternary multiplexer has been analyzed which are fundamental components of all ternary digital logic circuits. Multiplexer is the most used digital component is many digital circuits. A multiple-valued logic (MVL) circuit uses less energy and has more valued logic in each digit than a binary logic circuit. As a result, a ternary multiplier (TMUL) for embedded circuits with low power consumption is proposed in this paper. The cascading proposed ternary multiplexer is all that is used in the CNTFET-based TMUL circuit to reduce the number of transistors and boost performance efficacy. A simulator tool has been used to simulate all the designed digital circuits. The proposed circuit has taken the very less number of transistors so that the complexity and power consumptions has been reduced. Further calculated the average power consumption for all the proposed design.
References
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