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Analysis of Crosstalk in Coupled On-Chip VLSI Interconnects

Manjula Jayamma, N. Ramanjaneyulu, Anchula Sathish, Y. Mallikarjuna Rao


In this work an analytical approach providing closed form expressions for dynamic crosstalk in coupled interconnects under sub-threshold condition is proposed. The sub-threshold current–voltage expression for a metal-oxide semiconductor transistor serves as the foundation for the proposed model. When inputs switch in-phase or out-of-phase, the model determines the aggressor and victim drivers' propagation delays and timings. The analytical results are compared with spice simulation. Under in-phase switching, the average error in the propagation delay with respect to SPICE is 2.02 and 3.274% for the aggressor and victim buffers, respectively. For out-of-phase switching, average errors in the same are 2.3 and 1.87%.

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