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Design of LNA for GPR Application Using TSMC 130 nm CMOS Technology

Purvi Ashwath, Purvi Chandrashekar, Ramya Sheshadri, Dr. Kiran Bailey

Abstract


This paper presents the design, simulation, and performance evaluation of a Low Noise Amplifier (LNA) for Ground Penetrating Radar (GPR) applications using TSMC 130 nm CMOS technology[1]. The proposed LNA is designed to operate in the GHz frequency range while achieving high gain, low noise figure, proper impedance matching, and reliable stability[10]. Traditional CMOS LNA architectures face challenges due to bulky on-chip inductors, limited quality factors, and area constraints[7]. This work explores a multi-stage cascaded common-source topology with inductive input matching to enhance RF performance. Key parameters such as gain (S21), transient behavior, stability, and signal integrity are analyzed. Simulation results demonstrate a peak gain of 17.71 dB with effective signal amplification and low distortion, making the design suitable for GPR and other RF receiver front-end systems. The study also examines technology scaling effects and discusses future trends in compact, high-performance LNA architectures[16].


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References


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