| Issue | Title | |
| Vol 7, No 1 (2024) | Cloud computing using Internet of Thinks (IoT) in Big Data Storage | Abstract |
| K. Thamizhmaran | ||
| Vol 7, No 2 (2024) | Comparative Study of a Low-Power High-Speed Arithmetic Logic Unit Design Techniques | Abstract |
| Md Khairul Islam, Satyendra Nath Biswas | ||
| Vol 7, No 2 (2024) | Comparator: Existing architectures and a novel design methodology | Abstract |
| Saima Bashir, Hakim Najeeb-ud-din, G. M. Rather | ||
| Vol 2, No 2 (2019) | Comparison and Estimation of Sulphur Content in Copra | Abstract |
| T. Vishvapriya, A. Stephen Sagayaraj, S. Vinothini, R. Pradeepa, P. Suganthi | ||
| Vol 3, No 2 (2020) | Current Leakage Identification System with Electricity Bill Payment | Abstract |
| Aneeth M., Sandeep M. S., Anas M., Vishnuduth A. S., Manju Ann Mathews | ||
| Vol 2, No 1 (2019) | Cut off for Viable Transfer Coordination in Power, Waterways state | Abstract |
| Rajesh Kumar | ||
| Vol 1, No 2 (2018) | Deep Convolutional Auto-Multiplexers for Emotion Recognition from Facial Expressions | Abstract |
| T MUNI REDDY, R. P. Singh | ||
| Vol 9, No 1 (2026): Jan-Apr | Density-Gradient Based Quantum Analysis of Nanowire Transistor | Abstract |
| Andrew D. Adams, Satyendra N. Biswas | ||
| Vol 5, No 1 (2022) | Design and Analysis of Low Power High Speed Shift and Add Multiplier for Error Tolerant Applications | Abstract |
| M. Manikanda Prabhu, K. B. Ramesh | ||
| Vol 8, No 1 (2025) | DESIGN AND CONSTRUCTION OF THREE PHASE SEQUENCE DETECTOR | Abstract |
| Ohiwerei Chris Ohiomah | ||
| Vol 5, No 1 (2022) | Design and Development of Reconfigurable Cache Memory | Abstract |
| Parag Chaudhary, K. B. Ramesh | ||
| Vol 7, No 2 (2024) | Design and Implementation of 4-bit Multiplier using Vedic System | Abstract |
| Chirag M, K. B. Ramesh | ||
| Vol 7, No 3 (2024) | Design and implementation of advanced Techniques in Synchronous Sequential Circuit Design | Abstract |
| Kushagra Chaturvedi, K B Ramesh | ||
| Vol 7, No 3 (2024) | DESIGN AND IMPLEMENTATION OF AN POWER EFFICIENT CLOCK PULSED D-FLIP FLOP USING TRANSMISSION GATE | Abstract |
| Avikshit .B, K. B Ramesh | ||
| Vol 5, No 1 (2022) | Design and Implementation of Arithmetic and Logic Unit (ALU) using Novel Reversible Gates in Quantum Cellular Automata | Abstract |
| Likitha S., K. B. Ramesh | ||
| Vol 7, No 2 (2024) | Design and Implementation of Comparator circuit using Advanced Logic Technologies | Abstract |
| Shreesha Kumara K, K B Ramesh | ||
| Vol 7, No 3 (2024) | Design and Implementation of SIL 4 FPGA based Control Hardware for Traction Applications | Abstract |
| Nitin Mammen Joy, K B Ramesh | ||
| Vol 9, No 1 (2026): Jan-Apr | Design of AHB to APB Bridge for Low Power Operation | Abstract |
| Sudhanva Raju B, Sneha Katti, Sudan M, Shreya P, Dr. Kiran Bailey | ||
| Vol 9, No 2 (2026): May-Aug | Design of Novel 64- bit Multiplier-Accumulator using Vedic Multiplier & Hybrid Adder | Abstract |
| A Akash, Mahanthesh K, Manjesh M, Y T Lokesh, Prof. K Sujatha | ||
| Vol 7, No 3 (2024) | DESIGN OF OPTIMIZED ALU | Abstract |
| Spriha Dibbi, K. B. Ramesh | ||
| Vol 2, No 2 (2019) | Determinant based Completely Programmed one Sweep Versatile Picture Scaling Calculation | Abstract |
| Selvan Kumar | ||
| Vol 5, No 2 (2022) | Diabetes Detection through Web Application and Personal Home Training System | Abstract |
| Srinivas Mishra, Aruna Tripathy | ||
| Vol 4, No 2 (2021) | Diabetic Retinopathy Stages Identification of Fundus Images | Abstract |
| Jinsha Manoharan, Neethu Raveendran | ||
| Vol 2, No 3 (2019) | Differential Assurance Plan for Power Transformer Security | Abstract |
| Kausturbha Sonar | ||
| Vol 6, No 2 (2023) | Dual Input DC-DC Converter for Electrical Vehicle | Abstract |
| Shaik Daryabi, Kommu Suresh, Myla Chakradhar Srimanth, Bandam Hari Prasad, Dokala Divya | ||
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